multiplication - Trying to make a 4-bit multiplier in VHDL with 3x4 keypad input and 2x16 LCD to be implemented on a Spartan 3E board -

Everyone is trying to create a 4-bit multiplier in VHDL using this on a spartan 3E board This is to be done using a built-in 2x16 lcd and a 3x4 keypad through a C922 IC

. The user inputs a number through the keypad, presses a button to confirm, enters another number, presses the confirmation button again, and the product appears on the LCD.

So far, the code for keypad + c922 and LCD is fine. The code for multiplier is almost ok. The problem is that the confirmation button only works when another number (which is not used eventually) is pressed.

This is my code. I have the following on the screenshot of Xilinx simulation

  library IEEE; Use IEEE.STD_LOGIC_1164.ALL; Use IEEE.STD_LOGIC_ARITH.ALL; Use IEEE.STD_LOGIC_UNSIGNED.ALL; The unit is multi_4bit port (CLK: STD_LOGIC; reset: STD_LOGIC; Input: STD_LOGIC_VECTOR (3 downto); DAVBL: STD_LOGIC; Confirm: in STD_LOGIC; Output: STD_LOGIC_VECTOR (7 downto 0) outside;); Majority end; The behavior type of architecture is the majority state (R, S, S1, S2, S3, S4); Signal pstate, nstate: state; Signal A_sig, B_sig: STD_LOGIC_VECTOR (3 below 0); State start state_transition: process (clk, reset) if reset = '1' then pstate & lt; = R; Elsif RID_Age (CLK) then pstate & lt; = Nstate; end if; end process; Nstate_output: process (pasta, davl, input) variable temp_var: STD_LOGIC_VECTOR (down to 3); Variable tempMult_var, tempProd_var: STD_LOGIC_VECTOR (7 down down 0); The initial case is pstate when r = & gt; Nstate & lt; = S0; TempMult_var: = (other => '0'); TempProd_var: = (Other => '0'); A_sig & lt; = (Other => '0'); B_sig & lt; = (Other => '0'); Output & lt; = (Other => '0'); When S0 = & gt; Nstate & lt; = S0; If (DAVBL = '1') then A_sig and LT; = Input; Nstate & lt; = S1; end if; When S1 = & gt; Nstate & lt; = S1; If (confirm = '1') then nstate & lt; = S2; end if; When S2 = & gt; Nstate & lt; = S2; If (DAVBL = '1') then B_sig and LT; = Input; Nstate & lt; = S3; end if; When S3 = & gt; Nstate & lt; = S3; If (confirm = '1') then nstate & lt; = S4; end if; When S4 = & gt; Nstate & lt; = S0; 0 to 3 loop in temp_var for x: = (A_sig and (B_sig (x) & B_sig (x) & b_sig (x) & b_sig (x))); TempMult_var: "" 0000 "& amp; Temp_var; If (x = 0) then tempMult_var: = tempMult_var; Elsif (X = 1) then tempMult_var: = tempMult_var (6 below 0) and "0"; Elsif (X = 2) then tempMult_var: = tempMult_var (5 below) and "00"; Elsif (X = 3) then tempMult_var: = tempMult_var (4 down 0) and "000"; end if; TempProd_var: = tempProd_var + tempMult_var; End loop; Output & lt; = TempProd_var; TempProd_var: = (Other => '0'); End Case; end process; End behavior;  

Simulation when a number is pressed with the confirmation button:

Simulation when a number is pressed with the confirmation button:

I 'Now going through his code for an hour, but still he can not see the wrong. Anyone who can help in advance, thanks. As mentioned by fru1tbat, Brian and David, you have sensitivity in the connective part of your state machine as